Boost multiprotocol performance with a wireless MCU offering high embedded memory
Combine the high performance of the Arm® Cortex®-M33 32-bit RISC core, with the 1MB of on-chip Flash memory, up to 512KB SRAM and 2.4GHz radio of the STM32WBA64CGU6 MCU from STMicroelectronics, to boost multiprotocol wireless.
The powerful ultra-low-power radio enables Bluetooth® LE and IEEE 802.15.4-2015 PHY and MAC, to support Matter, Thread, and Zigbee, including modes which offer concurrent operation. Up to eight antennas, and an external power amplifier, are supported, in addition to a packet traffic arbitration (PTA) interface.
The Cortex-M33 core features a floating-point unit (FPU), supporting all the Arm single-precision data-processing instructions and all data types. This core implements a full set of digital signal processing (DSP) instructions and a memory protection unit (MPU) to enhance application security.
Power is managed by the embedded regulator low dropout (LDO) voltage regulator and SMPS stepdown converter, which support switching on-the-fly, and voltage scaling.
Certification is simplified as the STM32WBA64CGU6 is certified to platform security architecture (PSA) Level 3 and SESIP Level 3, in addition to complying to the radio equipment directive (RED) and US security standards.
Security on the STM32WBA64CGU6 is compliant with the Arm trusted-based security architecture (TBSA) and offers a secure boot, secure data storage, and secure firmware update. Secure firmware installation allows the customer to secure code provisioning during production. Flexible life-cycle management is through multi-level readout protection and debug unlock with password.
Firmware hardware isolation is supported by the securable peripherals, memories and I/Os, in addition to privilege configuration of peripherals and memories.
Protection for the embedded memory is for readout protection, write protection, secure, and hide protection areas. Dedicated peripherals provide security with a fast AES coprocessor, secure AES coprocessor with DPA resistance and a hardware unique key that can be shared by hardware with fast AES. There is also a public key accelerator (PKA) with DPA resistance, a HASH hardware accelerator, and a true random number generator.
Active tamper detection and protection against transient perturbation attacks is provided by internal monitoring which generates secret data erase in an attack. Hardware semaphores allow synchronization between software processes.
The radio, communication, analog, and timer peripherals can be functional and autonomous in Stop mode with direct memory access due to the background autonomous mode (BAM).