Versatile PCIe clock generators marry small size and low cost with high performance
Renesas has added to its VersaClock® family of programmable clock generators with the new VersaClock 7 series of small, low-cost devices for PCI Express (PCIe) Gen5 and Gen6 and networking applications.
New members of the Renesas VersaClock family offer low jitter and noise to give low bit error rates in high-performance computing systems.
The new VersaClock 7 products fill a gap in the market for high-performance clock generators that meet the requirements of designs limited by tight power and cost budgets. Like the other members of the VersaClock family, the new products simplify system designs by replacing multiple discrete timing components and reducing component count.
Offering up to 27 programmable configurations, the new VersaClock 7 products are reusable across multiple designs. A redundant input allows for provision of back-up signals. The clock generators support universal LVCMOS/ LVDS/LP-HCSL outputs.
Low phase noise gives a wide system design margin and produces a lower bit error rate.
|RC21005AQ||5-output clock generator||4 mm x 4 mm 32-ball LGA|
|RC21008A(Q)*||8-output clock generator||5 mm x 5 mm 40-lead VFQFPN or 40-ball LGA|
|RC21012A(Q)*||12-output clock generator||6 mm x 6 mm 48-lead VFQFPN or 48-ball LGA|
|RC31005AQ||5-output jitter attenuator||4 mm x 4 mm 32-ball LGA|
|RC31008A(Q)*||8-output jitter attenuator||5 mm x 5 mm 40-lead VFQFPN or 40-ball LGA|
|RC31012A(Q)*||12-output jitter attenuator||6 mm x 6 mm 48-lead VFQFPN or 48-ball LGA|