Low-power FPGAs reduce thermal design constraints in edge AI

The PolarFire FPGA family from Microchip addresses the requirement for devices that deliver high reliability and security without the high power consumption typical of SRAM-based alternatives. The architecture is optimized to bridge the gap between low-density programmable logic and high-performance FPGAs, enabling the deployment of complex logic in thermally constrained designs.

Microchip’s new PolarFire FPGA Core series is a streamlined platform that omits Serializer/Deserializer (SerDes) and PCIe^® interfaces from the PolarFire FPGA family, reducing the cost and complexity of developing Artificial Intelligence (AI) and Machine Learning (ML) applications.

The PolarFire FPGA Core series uses non-volatile Flash technology to reduce power consumption by up to 50%. This efficiency allows designers to implement fanless enclosures for thermal management in harsh industrial environments.

To facilitate AI deployment, the PolarFire FPGA Core series supports the VectorBlox^® Accelerator Software Development Kit (SDK), which compiles neural networks from standard frameworks such as TensorFlow and ONNX into a binary format that loads into the FPGA memory. This workflow enables the FPGA to perform complex inference tasks, such as object detection and sensor fusion, without requiring the developer to have FPGA logic design expertise.

Microchip has also introduced the PolarFire FPGA Ethernet Sensor Bridge to support real-time decision-making further. This solution allows the development of AI-driven sensor processing systems compatible with the NVIDIA Holoscan platform.

The series offers densities up to 481,000 Programmable Logic Elements (PLEs) and SoC variants that integrate a 64-bit, quad-core RISC-V^® processor, enabling real-time control and Linux^®-capable processing on a single chip.