How MCU Users Can Benefit from Exploring the Scope to Use a Low-End FPGA

Figure 1: An FPGA provides a highly programmable hardware fabric.

In the early years of the field-programmable gate array (FPGA) in the 1980s, the limitations of semiconductor technology meant that the devices were small and simple. Featuring just a few hundred logic gates, these early FPGAs were used to integrate functions previously implemented in multiple discrete logic components in a single programmable chip. The market for FPGAs grew rapidly as design engineers recognized the value to be gained from the FPGA’s ability to reduce component count, save board space and reduce the complexity of board layouts.

Progress in semiconductor technology inevitably meant that the FPGA has been transformed since the 1980s, becoming the large and sophisticated device we know today. At the high end of the market, FPGAs feature millions of gates, ultra-high–speed interfaces supporting data transfers at rates higher than 30 Gbits/s and multiple hardwired IP blocks implementing embedded processors, PLLs, functional SRAM memory and more.

High-end FPGAs, the staple solution for applications like data processing, imaging and high-bandwidth communications equipment, attract the most attention and take the lion’s share of the industry’s marketing and promotional dollars. But it is helpful to remember that the original role played by small FPGAs still has value in functions like:

  • Glue logic integration
  • Simple counter or PWM
  • Basic state machine
  • Control logic
  • I/O and interface bridging
  • I/O expanders
  • Aggregation of multiple sensor inputs
  • Voltage monitoring

A vibrant market for small, low-cost and low-end FGPAs supports these and other functions. Its importance to OEMs is reflected in the arrival of a new entrant to the FPGA market, Renesas Electronics, which is set to release its first FPGAs in 2023.

Opinions remain divided, however, about the applicability of FPGAs in mainstream industrial and consumer electronics devices. Design engineers who are familiar with microcontrollers (MCUs) commonly view FPGAs as an alien concept: expensive, power-hungry and difficult to use.

This might be true of the high-end FPGAs supplied by Xilinx, now a part of AMD, and Intel. It is not true of the low-end FPGAs supplied by Lattice Semiconductor and Microchip, soon to be joined by Renesas. And in fact, the use of FPGAs offers several important advantages over MCUs in many functions.

In an MCU, tasks are implemented sequentially and in software. In an FPGA, tasks are performed in parallel and in hardware. This produces the attractive characteristics of an FPGA’s operation: highly deterministic performance, low latency, the flexibility to customize the hardware and very low power consumption.

This article provides an understanding of the basic operation of an FPGA and how the design tools supplied by FPGA manufacturers make the implementation of an FPGA in an electronics system design straightforward and predictable.

The basic architecture of an FPGA

An FPGA is made up of three basic elements (see Figure 1):

  • Programmable logic elements (LEs)
  • Programmable routing interconnections
  • Configurable I/Os that provide for communication with the external world

A logic element is made of a configurable lookup table (LUT) and a sequential element (SE). The LUT can be configured as any type of combinatorial logic, such as OR, AND or XOR. The SE is generally configured as a simple flip-flop.

The LE is the basic functional block of an FPGA, and this is why every FPGA is classified according to the number of LEs that it contains. The low end of the FPGA market covers FPGAs with between a few hundred LEs to 10,000 LEs.

The programmable interconnection links the configured LEs together to implement the functions required by an application.

The I/Os are also programmable and can be configured to support any I/O interface standard.

The underlying hardware that implements these elements is a huge number of programmable switches. In most FPGAs, these switches are programmed afresh every time the FGPA is powered up. This requires a programming file to be stored in a configuration memory, which can be either internal in the FPGA chip or external.

Microchip FPGAs are the exception to this rule: Their programmable switches are made in a technology that resembles nonvolatile flash memory. Directly programmed, they have no need for a programming file or configuration memory.

How to configure FPGA hardware

All FPGA manufacturers supply their own design tool to generate this programming file, more often known as a bitstream. Every manufacturer’s tool is similar to the others. The tools provide these features:

  • Functional description using a standard hardware description language (HDL) (either VHDL or Verilog)
  • Synthesis
  • Place-and-route
  • Programming file generation

The FPGA design flow is supported by the tool that each FPGA manufacturer provides for its devices.

Figure 2: The FPGA design flow is supported by the tool that each FPGA manufacturer provides for its devices.

Timing analysis forms part of the design flow to check that the propagation delay affecting the transfer of signals through the routing structure is consistent with the performance requirements of the application (see Figure 2). It is also important to simulate and verify the code generated by the HDL tool to verify that the functions programmed into the FPGA operate in accordance with the design specification.

Nothing in the entire FPGA development process is as difficult as the implementation of timing analysis and RTL simulation—and they are not especially complex. All the other stages are automatically performed by the design tool and take only a few minutes to be executed on a standard laptop computer.

Each FPGA manufacturer supplies their own toolset; the main difference between them is in the graphical user interface. It is easy to migrate from one to another, as long as the source code has been written using either the standard VHDL or Verilog description languages. Use of the tools is generally available to FPGA users via a free license. FPGA evaluation boards are readily available at a low cost, so the cost of tools and resources is no impediment to engineers who want to begin experimenting with low-end FPGAs.

Multiple choices of low-end FPGA products

The market for low-end FPGAs is served by three manufacturers: Microchip, Lattice and, most recently, Renesas.

Microchip’s product portfolio is mostly geared to the mid-range FPGA market. The entry-level parts in its IGLOO 2 flash FPGA family, however, do count as low-end FPGAs (see Figure 3).

Key features of the low-end parts in the Microchip IGLOO 2 FPGA product family.

Figure 3: Key features of the low-end parts in the Microchip IGLOO 2 FPGA product family

Microchip provides the Libero SoC tool for development on IGLOO 2 products. The license is free for devices with up to 25,000 LEs.

IGLOO 2 products are notable for their numerous memory options, including functional embedded nonvolatile memory, as well as high-speed interfaces.

Lattice has long maintained a policy of supporting the low-gate–density FPGA market and has a strong offering based on two families: XO2/XO3 and iCE40.

The XO2/XO3 family is based on volatile technology. It provides the configuration memory on the same die as the FPGA matrix, giving the user a single-chip FPGA solution, with no need for an external configuration memory.

The XO2/XO3 devices give a wide choice of density options, from as few as 256 LEs up to 10,000 LEs. Their main features are:

  • Almost instant-on operation thanks to the on-chip nonvolatile configuration memory
  • Single-voltage and low-power options
  • Hard-wired I2C and serial peripheral interfaces, PLLs, user flash memory and internal oscillator

The Diamond design tool for the XO2/XO3 is available from Lattice under a free license.

Lattice’s other family of low-end FPGAs, the iCE40 series, is split into several sub-families: iCE40LP, iCE40UL, iCE5LP, iCE40UP, iCE40LM and iCE40HX. The family covers the range from 384 LEs to 8,000 LEs. In the iCE40 family, Lattice has optimized the power/size/performance tradeoff for low power and small size: Static current is the market’s lowest, at less than 100 ”A. The iCE40 also features the FPGA industry’s smallest package, at just 1.4 × 1.4 mm.

The third of the low-end FPGA manufacturers, Renesas, is the most recent entrant to the market. Renesas is well known for its GreenPAK programmable mixed-signal product technology. This technology will now be complemented by a new FPGA offering.

The ForgeFPGA family provides relatively small amounts of programmable logic that can be quickly and efficiently designed into cost-sensitive applications. ForgeFPGA devices provide dramatic cost savings versus other alternatives, including non-FPGA designs. Renesas provides the Go Configure design software hub for its FPGAs under a free license.

A Renesas family of ForgeFPGA devices featuring from 1,000 LEs up to 4,000 LEs is expected to be introduced by the end of 2023, with parts available for sampling and production in 2024.

Low-end FPGAs: an accessible option for non-specialists

FPGAs are widely thought of as a high-end, high-cost, hard-to-use product for high-end applications. In fact, low-end FPGAs are quite the opposite. So Future Electronics suggests a new way of thinking about FPGAs to recognize their benefits in ordinary industrial and consumer applications like multiple motor control for robot arms, monitoring/alert management in factory equipment, inverters for electric-vehicle chargers, battery management systems, sensor signal processing in smart-building and smart-city applications and much more.

The scope for using these deterministic, low-power devices is very wide. MCU users who explore low-end FPGAs for the first time will find that they have much to gain from the effort.


Author : Patrice Brossard, Vertical Segment Manager Europe for FPGA Solutions, Future Electronics
First Published: EE Web 26 July 2023